---
type: source
title: "AI Compute Infrastructure Research Sessions — ARM, NVIDIA, TSMC"
author: "Theseus (research agent synthesis)"
url: n/a
date: 2026-03-24
domain: ai-alignment
intake_tier: research-task
rationale: "Cory directed research into physical infrastructure enabling AI — ARM strategy, NVIDIA dominance/moat, TSMC supply chain chokepoints. Goal: understand compute governance implications for alignment."
proposed_by: "Cory (via Theseus)"
format: report
status: processing
processed_by: theseus
tags: [compute-governance, semiconductors, supply-chain, power-constraints, inference-shift]
notes: "Compiled from 5 research agent sessions. VERIFICATION NEEDED: (1) NVIDIA-Groq acquisition ($20B) — UNVERIFIED, (2) OpenAI-AMD 10% stake — UNVERIFIED, (3) Meta MTIA 4 generations at 6-month cadence — needs confirmation. Structural arguments high-confidence; specific numbers need manual verification."
flagged_for_astra:
  - "Power constraints on datacenter scaling — overlaps energy domain"
  - "TSMC geographic diversification — manufacturing domain"
  - "CoWoS packaging bottleneck — manufacturing domain"
cross_domain_flags:
  - "Rio: NVIDIA vertical integration follows attractor state pattern"
  - "Leo: Taiwan concentration as civilizational single point of failure"
  - "Astra: Nuclear revival for AI power, semiconductor supply chain"
---

# AI Compute Infrastructure Research — Synthesis

Research compiled from 5 agent sessions on 2026-03-24. Three companies studied: ARM Holdings, NVIDIA, TSMC. Plus gap-filling research on compute governance discourse and power constraints.

## Key Structural Findings

### 1. Three chokepoints gate AI scaling
CoWoS advanced packaging (TSMC near-monopoly, sold out through 2026), HBM memory (3-vendor oligopoly, all sold out through 2026), and power/electricity (5-10 year build cycles vs 1-2 year chip cycles). The bottleneck is NOT chip design.

### 2. NVIDIA's moat is the full stack
CUDA ecosystem (4M+ developers) + networking (Mellanox/InfiniBand) + full-rack solutions (GB200 NVL72) + packaging allocation (60%+ of CoWoS). Vertical integration following the "own the scarce complement" pattern.

### 3. The inference shift redistributes AI capability
Training ~33% of compute (2023) → inference projected ~66% by 2026. Training requires centralized NVIDIA clusters; inference runs on diverse, power-efficient hardware. Structurally favors distributed architectures.

### 4. ARM's position is unique
Doesn't compete with NVIDIA — provides the CPU substrate everyone builds on. Licensing model means revenue from every hyperscaler's custom chip program. Power efficiency advantage aligns with inference shift.

### 5. TSMC is the single largest physical vulnerability
~92% of advanced logic chips (7nm and below). Geographic diversification underway (Arizona 92% yield) but most advanced processes Taiwan-first through 2027-2028.

### 6. Power may physically bound capability scaling
Projected 8-9% of US electricity by 2030 for datacenters. Nuclear deals cover 2-3 GW near-term against 25-30 GW needed. Grid interconnection averages 5+ years.

## Compute Governance Discourse Landscape

| Area | Maturity | Key Sources |
|------|----------|------------|
| Compute governance | High | Heim/GovAI (Sastry et al. 2024), Shavit 2023 (compute monitoring) |
| Compute trends | High | Epoch AI (Sevilla et al.), training compute doubling every 9-10 months |
| Energy constraints | Medium | IEA, Goldman Sachs April 2024, de Vries 2023 in Joule |
| Supply chain concentration | Medium-High | Chris Miller "Chip War", CSET Georgetown, RAND |
| Inference shift + governance | LOW — genuine gap | Fragmented discourse, no systematic treatment |
| Export controls as alignment | Medium | Gregory Allen CSIS, Heim/Fist "Secure Governable Chips" |

## UNVERIFIED Claims (DO NOT extract without confirmation)
- NVIDIA acquired Groq for $20B (Dec 2025)
- OpenAI took 10% stake in AMD
- Meta MTIA releasing 4 chip generations at 6-month cadence
- ARM Graviton4 "168% higher token throughput" vs AMD EPYC
- Specific market share percentages (vary by methodology)