m3taversal
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Mechanical space→hyphen conversion in frontmatter references (related_claims, challenges, supports, etc.) to match actual filenames. Fixes 26.9% broken link rate found by wiki-link audit. Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
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| type | domain | description | confidence | source | created | secondary_domains | depends_on | challenged_by | related | reweave_edges | |||||||
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| claim | manufacturing | TSMC Arizona fab cost $40B+, Samsung Taylor $17B, Intel Ohio $20B — fab economics drive geographic concentration because only nation-state-level subsidies (CHIPS Act $52.7B) can justify the investment | likely | Astra, Theseus compute infrastructure research 2026-03-24; CHIPS Act public records, TSMC/Samsung/Intel fab announcements | 2026-03-24 |
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Semiconductor fab cost escalation means each new process node is a nation-state commitment because 20B-plus capital costs and multi-year construction create irreversible geographic path dependence
Leading-edge semiconductor fabs now cost $20B+ to build and take 3-5 years to construct. TSMC's Arizona complex is projected at $40B+ for two fabs. Samsung's Taylor, Texas fab costs $17B. Intel's Ohio fabs are projected at $20B. These are not business investments — they are nation-state-level commitments that only proceed with massive public subsidies (US CHIPS Act $52.7B, EU Chips Act €43B, Japan ¥3.9T).
The cost escalation is structural: each new process node requires more complex lithography (EUV at $150M+ per tool, with only ASML as supplier), more processing steps, more precise materials, and more specialized workforce. The cost per transistor has stopped declining at the leading edge even as density continues improving — the economic scaling that drove Moore's Law is over, replaced by performance-per-watt scaling that costs more per fab generation.
This creates irreversible geographic path dependence: once a nation commits $20-40B to a fab, the workforce training, supplier ecosystem, and infrastructure investment lock in that geography for decades. TSMC choosing Arizona, Samsung choosing Taylor, Intel choosing Ohio — these are 30-year bets that shape where advanced chips can be made for a generation.
The personbyte constraint is directly relevant: a modern fab requires thousands of specialized workers operating in a knowledge network that takes years to develop. TSMC's Arizona fab initially struggled with yield because the knowledge network hadn't transferred — the tools were identical but the tacit knowledge wasn't. The 92% yield now achieved represents successful knowledge embodiment, not just equipment installation.
Challenges
CHIPS Act subsidies are successfully pulling fab investment to the US — the question is whether this is a one-time relocation or a sustained diversification. If subsidies are not renewed for subsequent fab generations, investment may revert to existing clusters (Taiwan, South Korea) where the knowledge networks and supplier ecosystems are deepest. Advanced packaging may be more geographically distributable than logic fabrication, which could partially reduce single-geography risk even if fab concentration persists.
Relevant Notes:
- the personbyte is a fundamental quantization limit on knowledge accumulation forcing all complex production into networked teams — fab operation requires deep knowledge networks that constrain geographic diversification
- knowledge embodiment lag means technology is available decades before organizations learn to use it optimally creating a productivity paradox — TSMC Arizona yield gap illustrates knowledge embodiment in manufacturing
- compute supply chain concentration is simultaneously the strongest AI governance lever and the largest systemic fragility because the same chokepoints that enable oversight create single points of failure — fab cost escalation drives the concentration this claim describes
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